Lead Application Engineer
A leading company that provides an EDA and semiconductor IP is looking for a Lead Application Engineer. Requirements: • BSc with Electrical engineering or Computer Science. • Min of 3 years of experience with Verification. • Experience with Developing Verification environments using System Verilog or Specman. • Familiar with the eRM, OVM or UVM methodologies. • Experience with Unix / Linux environment. • Very good English knowledge, capable to have fluent discussions and communicate through emails.